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A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.

C. Sudarshan, J. Lappas, C. Weis, D. Mathew, M. Jung, and N. Wehn. SAMOS, volume 11733 of Lecture Notes in Computer Science, page 429-441. Springer, (2019)

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Norbert Wehn

Carl Wehn

Robert Wehn

Arnold Wehn

Joachim Wehn

Other publications of authors with the same name

Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs.M. Mahdavi, S. Weithoffer, M. Herrmann, L. Liu, O. Edfors, N. Wehn, and M. Lentmaier. IEEE Trans. Circuits Syst. I Regul. Pap., 69 (5): 1962-1975 (2022)ZuSE KI-AVFG. Thieu, S. Gesper, G. Payá-Vayá, C. Riggers, O. Renke, T. Fiedler, J. Marten, T. Stuckenberg, H. Blume, C. Weis and 18 other author(s). (2023)eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex.D. Stathis, C. Sudarshan, Y. Yang, M. Jung, S. Jafri, C. Weis, A. Hemani, A. Lansner, and N. Wehn. CoRR, (2019)A Reduced-Complexity Projection Algorithm for ADMM-Based LP Decoding.F. Gensheimer, T. Dietz, K. Kraft, S. Ruzika, and N. Wehn. IEEE Trans. Inf. Theory, 66 (8): 4819-4833 (2020)Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node.J. Lappas, A. Chinazzo, C. Weis, C. Xia, Z. Wu, L. Ni, and N. Wehn. DATE, page 1083-1084. IEEE, (2022)Finite-Alphabet Message Passing using only Integer Operations for Highly Parallel LDPC Decoders.T. Monsees, D. Wübben, A. Dekorsy, O. Griebel, M. Herrmann, and N. Wehn. SPAWC, page 1-5. IEEE, (2022)ASIC implementation of a modified QR decomposition for tree search based MIMO detection.C. Gimmler-Dumont, P. Schläfer, and N. Wehn. LASCAS, page 1-4. IEEE, (2013)System simulation with PULP virtual platform and SystemC.É. Zulian, G. Haugou, C. Weis, M. Jung, and N. Wehn. RAPIDO, page 2:1-2:7. ACM, (2020)Energy Efficient FEC Decoders.M. Herrmann, C. Kestel, and N. Wehn. ISTC, page 1-5. IEEE, (2021)An LPDDR4 Safety Model for Automotive Applications.L. Steiner, K. Kraft, D. Uecker, M. Jung, M. Huonker, and N. Wehn. MEMSYS, page 12:1-12:9. ACM, (2021)

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Disambiguation of "Wehn, Norbert"

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A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.

Please choose a person to relate this publication to

Norbert Wehn

Carl Wehn

Robert Wehn

Arnold Wehn

Joachim Wehn

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wehn, Norbert"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.

Please choose a person to relate this publication to

Norbert Wehn

Carl Wehn

Robert Wehn

Arnold Wehn

Joachim Wehn

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.