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A Hardware Perspective on the ChaCha Ciphers: Scalable Chacha8/12/20 Implementations Ranging from 476 Slices to Bitrates of 175 Gbit/s.

, , , , and . SoCC, page 294-299. IEEE, (2019)

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HLS-Based Performance and Resource Optimization of Cryptographic Modules., , , and . ISPA/IUCC/BDCloud/SocialCom/SustainCom, page 1009-1016. IEEE, (2018)A WCET-aware parallel programming model for predictability enhanced multi-core architectures., , , , , and . DATE, page 943-948. IEEE, (2018)Reliable Fail-Operational Automotive E/E-Architectures by Dynamic Redundancy and Reconfiguration., , , and . SoCC, page 203-208. IEEE, (2019)A combined lattice BGK/level set method for immiscible two-phase flows., , , , and . Comput. Math. Appl., 58 (5): 950-964 (2009)V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling., , and . J. Signal Process. Syst., 94 (9): 865-882 (2022)Digital On-Demand Computing Organism for Real-Time Systems., , , , , , , and . ARCS Workshops, volume P-81 of LNI, page 230-245. GI, (2006)Model-based Attack Tree Generation for Cybersecurity Risk-Assessments in Automotive., , , and . ISSE, page 1-7. IEEE, (2021)An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Des. Test Comput., 25 (5): 442-451 (2008)An Adaptive Lockstep Architecture for Mixed-Criticality Systems., , , and . ISVLSI, page 7-12. IEEE, (2021)Embedded Face Recognition for Personalized Services in the Assistive Robotics., , , , , , and . PKDD/ECML Workshops (1), volume 1524 of Communications in Computer and Information Science, page 339-350. Springer, (2021)