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Disambiguation of "Gupta, Sandeep K."

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Delay Fault Testing: How Robust are Our Models?

, , , , and . VTS, page 502-503. IEEE Computer Society, (1996)

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Sandeep Gupta

Varun K Gupta

Sandeep Sadanandan

Sandeep Kumar

Sandeep Nambiar

 

Other publications of authors with the same name

Zero Aliasing for Modeled Faults., and . IEEE Trans. Computers, 44 (11): 1283-1295 (1995)A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression., and . IEEE Trans. Computers, 40 (6): 743-763 (1991)Maximizing Yield per Area of Highly Parallel CMPs Using Hardware Redundancy., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (10): 1545-1558 (2014)An automatic test pattern generator for minimizing switching activity during scan testing activity., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (8): 954-968 (2002)DS-LFSR: a BIST TPG for low switching activity., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (7): 842-851 (2002)Allocation Techniques for Reducing BIST Area Overhead of Data Paths., , and . J. Electron. Test., 13 (2): 149-166 (1998)Diagnosis of delay faults due to resistive bridges, delay variations and defects., , and . ATS, page 215-224. IEEE, (2006)A 64-MHz clock-rate ΣΔ ADC with 88-dB SNDR and -105-dB IM3 distortion at a 1.5-MHz signal frequency., and . IEEE J. Solid State Circuits, 37 (12): 1653-1661 (2002)Design of efficient BIST test pattern generators for delay testing., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (12): 1568-1575 (1996)An Automatic Test Pattern Generator for At-Speed Robust Path Delay Testing., and . Asian Test Symposium, page 88-95. IEEE Computer Society, (1998)