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An 11-b 100-MS/s Fully Dynamic Pipelined ADC Using a High-Linearity Dynamic Amplifier.

Y. Park, J. Song, Y. Choi, C. Lim, S. Ahn, и C. Kim. IEEE J. Solid State Circuits, 55 (9): 2468-2477 (2020)

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Sungjune Park

Rosemary Park

Byungwoog Park

Chulmin Park

Sungchole Park

Другие публикации лиц с тем же именем

A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique.J. Song, Y. Park, C. Lim, Y. Choi, S. Ahn, S. Park, и C. Kim. IEEE J. Solid State Circuits, 57 (5): 1492-1503 (2022)COVID-19 Testing and Diagnostics: A Review of Commercialized Technologies for Cost, Convenience and Quality of Tests.A. Benda, L. Zerajic, A. Ankita, E. Cleary, Y. Park, и S. Pandey. Sensors, 21 (19): 6581 (2021)A Sub-fs-FoM Digital LDO Using PMOS and NMOS Arrays With Fully Integrated 7.2-pF Total Capacitance.J. Maeng, M. Shim, J. Jeong, I. Park, Y. Park, и C. Kim. IEEE J. Solid State Circuits, 55 (6): 1624-1636 (2020)An 11-b 100-MS/s Fully Dynamic Pipelined ADC Using a High-Linearity Dynamic Amplifier.Y. Park, J. Song, Y. Choi, C. Lim, S. Ahn, и C. Kim. IEEE J. Solid State Circuits, 55 (9): 2468-2477 (2020)3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop.S. Bae, Y. Kim, Y. Park, и C. Kim. IEEE J. Solid State Circuits, 52 (2): 605-610 (2017)Involvement of the anterior cingulate and frontoinsular cortices in rapid processing of salient facial emotional information.J. Fan, X. Gu, X. Liu, K. Guise, Y. Park, L. Martin, A. de Marchena, C. Tang, M. Minzenberg, и P. Hof. NeuroImage, 54 (3): 2539-2546 (2011)A 1 MS/s 9.15 ENOB Low-Power SAR ADC with Triple-Charge-Sharing Technique.S. Ahn, J. Song, C. Lim, Y. Choi, S. Park, Y. Park, и C. Kim. ISOCC, стр. 1-2. IEEE, (2020)Scan4CFU: Low-cost, open-source bacterial colony tracking over large areas and extended incubation timesS. Pandey, Y. Park, A. Ankita, и G. Phillips. HardwareX, (октября 2021)A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs.Y. Park, J. Kim, и C. Kim. IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (11): 1889-1897 (2016)A Capacitively Coupled CT Δ ΣM With Chopping Artifacts Rejection for Sensor Readout ICs.C. Lim, Y. Choi, Y. Park, J. Song, S. Ahn, S. Park, и C. Kim. IEEE Trans. Circuits Syst. I Regul. Pap., 68 (8): 3242-3253 (2021)

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