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Fast and accurate resource estimation of RTL-based designs targeting FPGAS., and . FPL, page 59-64. IEEE, (2008)Fast RTL Power Estimation for FPGA Designs., , , , and . FPL, page 343-348. IEEE Computer Society, (2011)Design reuse through high-level library mapping., and . ED&TC, page 345-350. IEEE Computer Society, (1995)RT Component Sets for High-Level Design Applications., and . VLSI Design, 5 (2): 155-165 (1997)Coherent control of quantum and entanglement dynamics via periodic modulations in optomechanical semiconductor resonator coupled to quantum-dot excitons., , , and . Quantum Inf. Process., 20 (3): 1-21 (2021)Rapid estimation for parameterized components in high-level synthesis., and . IEEE Trans. Very Large Scale Integr. Syst., 1 (3): 296-303 (1993)High-level library mapping for memories., and . ACM Trans. Design Autom. Electr. Syst., 5 (3): 566-603 (2000)Reclocking for high-level synthesis., , and . ASP-DAC, ACM, (1995)Library mapping for memories., and . ED&TC, page 288-292. IEEE Computer Society, (1997)Rapid Technology Projection for High-Level Synthesis., and . VLSI Design, page 155-158. IEEE Computer Society, (1994)