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Disambiguation of "Raghunathan, Anand"

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Ev-Edge: Efficient Execution of Event-based Vision Algorithms on Commodity Edge Platforms.

, , , and . CoRR, (2024)

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Davinder Kumar Anand

Raghunathan Ramakrishnan

Devanathan Raghunathan

Amar Frank Anand

Madhankumar Anandhakrishnan

 

Other publications of authors with the same name

System-on-Chip Power Management Considering Leakage Power Variations., , , and . DAC, page 877-882. IEEE, (2007)Analyzing the energy consumption of security protocols., , , and . ISLPED, page 30-35. ACM, (2003)Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips., , , and . DAC, page 513-518. ACM, (2000)STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks., , , and . CoRR, (2014)Hardware Accelerated Power Estimation, , and . CoRR, (2007)Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (10): 2193-2206 (2006)Application-specific heterogeneous multiprocessor synthesis using extensible processors., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (9): 1589-1602 (2006)Controller-based power management for control-flow intensive designs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (10): 1496-1508 (1999)Generation of distributed logic-memory architectures through high-level synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (11): 1694-1711 (2005)High-level energy macromodeling of embedded software., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (9): 1037-1050 (2002)