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Pushing the Level of Abstraction of Digital System Design: A Survey on How to Program FPGAs., , , , , and . ACM Comput. Surv., 55 (5): 106:1-106:48 (2023)Large Forests and Where to "Partially" Fit Them., , and . ASP-DAC, page 550-555. IEEE, (2022)Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC., , , , , , , and . IPDPS Workshops, page 452-459. IEEE, (2023)Journal Track Paper ICFPT 2023 : Across Time and Space: Senju's Approach for Scaling Iterative Stencil Loop Accelerators on Single and Multiple FPGAs., , and . ICFPT, page 5. IEEE, (2023)A CAD-based methodology to optimize HLS code via the Roofline model., , , , , and . ICCAD, page 116:1-116:9. IEEE, (2020)Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project., , , , , and . DATE, page 410-415. IEEE, (2017)Hardware Design Automation of Convolutional Neural Networks., , , , , and . ISVLSI, page 224-229. IEEE Computer Society, (2016)On the Automation of Radiomics-Based Identification and Characterization of NSCLC., , , , , and . IEEE J. Biomed. Health Informatics, 26 (6): 2670-2679 (2022)New Solution For a (Scaff)Old Problem: an FPGA Approach., , , , and . IPDPS Workshops, page 75-78. IEEE, (2023)Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code., , , , , , , , and . CGO, page 193-205. IEEE, (2019)