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FLECSim-SoC: A Flexible End-to-End Co-Design Simulation Framework for System on Chips.

, , , , and . SoCC, page 83-88. IEEE, (2021)

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Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA., , , , and . ISVLSI, page 371-372. IEEE, (2022)Transparent Near-Memory Computing with a Reconfigurable Processor., , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 221-231. Springer, (2021)An Analytical Model of Configurable Systolic Arrays to find the Best-Fitting Accelerator for a given DNN Workload., , , , , and . DroneSE/RAPIDO@HiPEAC, page 73-78. ACM, (2023)In-NoC Circuits for Low-Latency Cache Coherence in Distributed Shared-Memory Architectures., , , , , and . MCSoC, page 138-145. IEEE Computer Society, (2018)Leveraging Mixed-Precision CNN Inference for Increased Robustness and Energy Efficiency., , , , , , and . SOCC, page 1-6. IEEE, (2023)FLECSim-SoC: A Flexible End-to-End Co-Design Simulation Framework for System on Chips., , , , and . SoCC, page 83-88. IEEE, (2021)Automated Search for Deep Neural Network Inference Partitioning on Embedded FPGA., , , , , , and . PKDD/ECML Workshops (1), volume 1752 of Communications in Computer and Information Science, page 557-568. Springer, (2022)Runtime Adaptive Cache Checkpointing for RISC Multi-Core Processors., , , , , and . SOCC, page 1-6. IEEE, (2022)SiFI-AI: A Fast and Flexible RTL Fault Simulation Framework Tailored for AI Models and Accelerators., , , , , and . ACM Great Lakes Symposium on VLSI, page 287-292. ACM, (2023)Hardware-aware Workload Distribution for AI-based Online Handwriting Recognition in a Sensor Pen., , , , , , and . MECO, page 1-4. IEEE, (2022)