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A new architecture for neural signal amplification in implantable brain machine interfaces., and . EMBC, page 2744-2747. IEEE, (2013)Design of a configurable neural Data compression system for intra-cortical implants., , , and . ISCAS, page 3473-3476. IEEE, (2010)Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics., , , and . ISCAS, page 2371-2374. IEEE, (2007)Decoding brain cognitive activity across subjects using multimodal M/EEG neuroimaging., and . EMBC, page 3224-3227. IEEE, (2017)Automatic threshold optimization in nonlinear energy operator based spike detection., , and . EMBC, page 774-777. IEEE, (2016)Channel characterization for implant to body surface communication., and . ISCAS, page 913-916. IEEE, (2011)A scalable architecture for geometric correction of multi-projector display systems., , , , , , and . Displays, (2015)Resource Constrained VLSI Architecture for Implantable Neural Data Compression Systems., , and . ISCAS, page 1481-1484. IEEE, (2009)Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics., , and . J. Signal Process. Syst., 52 (3): 249-261 (2008)A Scalable Wavelet Transform VLSI Architecture for Real-Time Signal Processing in High-Density Intra-Cortical Implants., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (6): 1266-1278 (2007)