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Disambiguation of "Herkersdorf, Andreas"

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Fine-Grained Power Modeling of Multicore Processors Using FFNNs.

, , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 186-199. Springer, (2020)

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Andreas Herkersdorf

Andreas G Herkersdorf

Irmgard Herkersdorf

Gudrun Herkersdorf

Andreas

 

Other publications of authors with the same name

Multicore Power Estimation using Independent Component Analysis Based Modeling., , , and . MCSoC, page 38-45. IEEE, (2019)Fine-Grained Power Modeling of Multicore Processors Using FFNNs., , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 186-199. Springer, (2020)Design Methodology for a Large Communication Chip., , , and . IEEE Des. Test Comput., 17 (3): 86-94 (2000)A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC., , , and . ARCS, volume 11479 of Lecture Notes in Computer Science, page 31-44. Springer, (2019)Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoC, , , , , and . Proceedings of the 1st IFIP International Conference on Biologically Inspired Cooperative Computing (BICC 2006), 216, page 107-113. Boston, MA, USA, Springer, (August 2006)Dark silicon management: an integrated and coordinated cross-layer approach., , , , , , , , , and 6 other author(s). it Inf. Technol., 58 (6): 297-307 (2016)X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures., , , , and . MEMSYS, page 178-193. ACM, (2020)A Comparison of Parallel Programming Models of Network Processors., , , , and . ARCS Workshops, volume P-41 of LNI, page 390-399. GI, (2004)LCT-DER: Learning Classifier Table with Dynamic-Sized Experience Replay for Run-time SoC Performance-Power Optimization., , , and . GECCO Companion, page 331-334. ACM, (2023)FlexPath NP - A network processor architecture with flexible processing paths., , , and . SoC, page 1-6. IEEE, (2008)