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Disambiguation of "Kleveland, Bendik"

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Early detection and repair of VRT and aging DRAM bits by margined in-field BIST.

, , , , , , , , , , , , , , , , , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)

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Bendik Höhn

Ivana Bendik

Edgar Bendik

 

Other publications of authors with the same name

Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design., , , , , and . IEEE J. Solid State Circuits, 36 (10): 1480-1488 (2001)Early detection and repair of VRT and aging DRAM bits by margined in-field BIST., , , , , , , , , and 14 other author(s). VLSIC, page 1-2. IEEE, (2014)On-Chip Interconnect Inductance - Friend or Foe (Invited)., , , , , and . ISQED, page 389-394. IEEE Computer Society, (2003)512-Mb PROM with a three-dimensional array of diode/antifuse memory cells., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 38 (11): 1920-1928 (2003)High-frequency characterization of on-chip digital interconnects., , , , , , and . IEEE J. Solid State Circuits, 37 (6): 716-725 (2002)Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design"., , , , , and . IEEE J. Solid State Circuits, 37 (2): 255 (2002)A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency., , , , , , , , , and 29 other author(s). ESSCIRC, page 458-461. IEEE, (2012)An Intelligent RAM with Serial I/Os., , , , , , , , , and 1 other author(s). IEEE Micro, 33 (6): 56-65 (2013)A 2.488-11.2 Gb/s multi-protocol SerDes in 40nm low-leakage CMOS for FPGA applications., , , , , , , , , and 7 other author(s). MWSCAS, page 5-8. IEEE, (2012)