Author of the publication

Type Freezing: Exploiting Attribute Type Monomorphism in Tracing JIT Compilers

, , , and . Proceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization, ACM, (February 2020)
DOI: 10.1145/3368826.3377907

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM., , , and . ESSDERC, page 283-286. IEEE, (2021)UMOC: Unified Modular Ordering Constraints to Unify Cycle- and Register-Transfer-Level Modeling., , , and . DAC, page 883-888. IEEE, (2021)Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology., , and . NOCS, page 1-8. IEEE, (2020)NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report., , , , , , , , and . CoRR, (2023)Symbolic Elaboration: Checking Generator Properties in Dynamic Hardware Description Languages., , , and . MEMOCODE, page 126-136. ACM / IEEE, (2023)The Maven vector-thread architecture., , , , , , and . Hot Chips Symposium, page 1. IEEE, (2011)PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks., , , , , , and . ICCD, page 437-445. IEEE, (2019)An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware., , , and . MICRO, page 55-67. IEEE Computer Society, (2018)Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator., , , , , and . IEEE Comput. Archit. Lett., 23 (1): 29-32 (January 2024)PyMTL3: A Python Framework for Open-Source Hardware Modeling, Generation, Simulation, and Verification., , , and . IEEE Micro, 40 (4): 58-66 (2020)