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Disambiguation of "Asati, Abhijit R."

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Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications.

, , and . Circuits Syst. Signal Process., 40 (6): 2883-2894 (2021)

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Abhijit Basu

Abhijit Majumdar

Abhijit Bose

Abhijit Basu

Abhijit Ghose

 

Other publications of authors with the same name

A Novel Edge-Map Creation Approach for Highly Accurate Pupil Localization in Unconstrained Infrared Iris Images., , and . J. Electr. Comput. Eng., (2016)High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications., , and . Comput. Intell., 37 (3): 1056-1067 (2021)Speed optimal FPGA implementation of the encryption algorithms for telecom applications., , and . Microprocess. Microsystems, (2020)Iris based biometric identification system., and . ICAILP, page 260-265. IEEE, (2014)Design of a Static Current Simulator Using Device Matrix Approach., and . ISED, page 193-197. IEEE, (2012)Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm., , and . Microprocess. Microsystems, (2021)Hardware Accelerators for Iris Localization., , and . J. Signal Process. Syst., 90 (4): 655-671 (2018)An improved high speed fully pipelined 500 MHz 8×8 baugh wooley multiplier design using 0.6 μm CMOS TSPC logic design style., and . ICIIS, page 1-6. IEEE, (2008)Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load., , and . ICETET, page 121-124. IEEE Computer Society, (2009)Low-latency median filter core for hardware implementation of 5 × 5 median filtering., , and . IET Image Process., 11 (10): 927-934 (2017)