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Disambiguation of "Win, San"

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Optimization of Rod String Design for the Sucker Rod Pumping System in Mann Oil Field

. International Journal of Trend in Scientific Research and Development, 3 (5): 2306-2311 (August 2019)
DOI: https://doi.org/10.31142/ijtsrd27883

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San San Lin

San San Hmwe

Thein Win

Zaw Win

Win Maung

 

Other publications of authors with the same name

Reserve Estimation of Initial Oil and Gas by using Volumetric Method in Mann Oil Field. International Journal of Trend in Scientific Research and Development, 3 (5): 2291-2295 (August 2019)Optimization of Rod String Design for the Sucker Rod Pumping System in Mann Oil Field. International Journal of Trend in Scientific Research and Development, 3 (5): 2306-2311 (August 2019)Text Embedded System using LSB Method. International Journal of Trend in Scientific Research and Development, 3 (5): 1818-1822 (August 2019)Cinema Ticket Selling System. International Journal of Trend in Scientific Research and Development, 3 (5): 1813-1817 (August 2019)Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing., , , , , , , , , and . ISQED, page 23-28. IEEE, (2017)A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding., , , , , and . IEEE J. Solid State Circuits, 57 (3): 845-857 (2022)A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection., , , , , and . IEEE J. Solid State Circuits, 57 (1): 68-79 (2022)A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices., , , , , , , , , and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)34.2 A 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-Cell-Computing-in-Memory Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge Devices., , , , , , , , , and 5 other author(s). ISSCC, page 568-570. IEEE, (2024)29.1 A 40nm 64Kb 56.67TOPS/W Read-Disturb-Tolerant Compute-in-Memory/Digital RRAM Macro with Active-Feedback-Based Read and In-Situ Write Verification., , , , , and . ISSCC, page 404-406. IEEE, (2021)