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Disambiguation of "Bhunia, Swarup"

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A Statistical Approach to Area-Constrained Yield Enhancement for Pipelined Circuits under Parameter Variations.

, , , and . Asian Test Symposium, page 170-175. IEEE Computer Society, (2005)

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Asamanjoy Bhunia

Anirban Bhunia

Krishna Swarup Jauhri

 

Other publications of authors with the same name

ENFIRE: An Energy-efficient Fine-grained Spatio-temporal Reconfigurable Computing Fabric (Abstact Only)., , , and . FPGA, page 275. ACM, (2016)SCOPE: Synthesis-Based Constant Propagation Attack on Logic Locking., , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (8): 1529-1542 (2021)On Database-Free Authentication of Microelectronic Components., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (1): 149-161 (2021)Golden-Free Hardware Trojan Detection Using Self-Referencing., , , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (3): 325-338 (2022)IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks., , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (2): 347-360 (February 2024)On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits., , , , and . IEEE Access, (2023)An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (6): 1010-1038 (2021)Resilient System-on-Chip Designs With NoC Fabrics., , , and . IEEE Trans. Inf. Forensics Secur., (2020)Internet of Things security: Are we paranoid enough?. ICCE, page 1. IEEE, (2018)Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits, , and . CoRR, (2007)