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Disambiguation of "Becker, Jürgen"

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An Analytical Model of Configurable Systolic Arrays to find the Best-Fitting Accelerator for a given DNN Workload.

, , , , , and . DroneSE/RAPIDO@HiPEAC, page 73-78. ACM, (2023)

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Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

 

Other publications of authors with the same name

Reliable Fail-Operational Automotive E/E-Architectures by Dynamic Redundancy and Reconfiguration., , , and . SoCC, page 203-208. IEEE, (2019)HLS-Based Performance and Resource Optimization of Cryptographic Modules., , , and . ISPA/IUCC/BDCloud/SocialCom/SustainCom, page 1009-1016. IEEE, (2018)A WCET-aware parallel programming model for predictability enhanced multi-core architectures., , , , , and . DATE, page 943-948. IEEE, (2018)A combined lattice BGK/level set method for immiscible two-phase flows., , , , and . Comput. Math. Appl., 58 (5): 950-964 (2009)ReLoDAQ: Resource-Efficient, Low-Overhead 200 Gbits-1 Data Acquisition System for 6G Prototyping., , , , and . FCCM, page 209. IEEE, (2023)Evaluation of a Hypervisor-Based Smart Controller for Industry 4.0 Functions in Manufacturing., , , and . WF-IoT, page 680-685. IEEE, (2021)Digital On-Demand Computing Organism for Real-Time Systems., , , , , , , and . ARCS Workshops, volume P-81 of LNI, page 230-245. GI, (2006)V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling., , and . J. Signal Process. Syst., 94 (9): 865-882 (2022)An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Des. Test Comput., 25 (5): 442-451 (2008)Evaluation of Different Manual Placement Strategies to Ensure Uniformity of the V-FPGA., , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 35-49. Springer, (2021)