Author of the publication

Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights.

, , , , , and . CoRR, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights., , , , , and . Proc. IEEE, 109 (10): 1706-1752 (2021)dMazeRunner: Executing Perfectly Nested Loops on Dataflow Accelerators., , , , and . ACM Trans. Embed. Comput. Syst., 18 (5s): 70:1-70:27 (2019)Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights., , , , , and . CoRR, (2020)RAMP: resource-aware mapping for CGRAs., , and . DAC, page 127:1-127:6. ACM, (2018)Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level., , , , , , , , , and 5 other author(s). DATE, page 1-10. IEEE, (2023)Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs., , , , , and . IEEE Trans. Computers, 73 (1): 221-234 (January 2024)Explainable-DSE: An Agile and Explainable Exploration of Efficient HW/SW Codesigns of Deep Learning Accelerators Using Bottleneck Analysis., , and . ASPLOS (4), page 87-107. ACM, (2023)URECA: Unified register file for CGRAs., , and . DATE, page 1081-1086. IEEE, (2018)SPX64: A Scratchpad Memory for General-purpose Microprocessors., , , , , , , , and . ACM Trans. Archit. Code Optim., 18 (1): 14:1-14:26 (2021)Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systems., , , , , , and . VTS, page 1-14. IEEE, (2022)