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Ultra-low-power biomedical circuit design and optimization: Catching the don't cares.

, , , and . ISIC, page 115-118. IEEE, (2014)

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Architectural Partitioning for System Level Design., and . DAC, page 62-67. ACM Press, (1989)Synthesis of Pipelined Instruction Set Processors., and . DAC, page 583-588. ACM Press, (1993)Slack allocation for yield improvement in NoC-based MPSoCs., , and . ISQED, page 738-746. IEEE, (2010)The Verilog hardware description language (2. ed.)., and . Kluwer, (1995)Synthesis by delayed binding of decisions., and . DAC, page 367-373. ACM, (1985)Synthesis of application-specific memory designs., and . IEEE Trans. Very Large Scale Integr. Syst., 5 (1): 101-111 (1997)Co-RAM: combinational logic synthesis applied to software partitions for mapping to a novel memory device., , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (6): 805-812 (2001)Address generation for memories containing multiple arrays., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (5): 377-385 (1998)Linking the Behavioral and Structural Domains of Representation for Digital System Design., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (1): 103-110 (1987)Architectural partitioning for system level synthesis of integrated circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (7): 847-860 (1991)