Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A case for integrated processor-cache partitioning in chip multiprocessors.

S. Srikantaiah, R. Das, A. Mishra, C. Das, and M. Kandemir. SC, ACM, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ragi Chita

Anna Chita

Claudia Dana Chita

Guranda Chitadze

Romy Das

Bio-economic modeling of soil resource conservation in Mid Hill Region of NepalR. Das. Uni Gießen, (2009)

Other publications of authors with the same name

Providing Time of Service Guarantees in Video-On-Demand Servers.N. Sarhan, and C. Das. WWW (Posters), (2003)Fault-Tolerant Task Mapping Algorithms for MIN-Based Multiprocessors.M. Algudady, C. Das, and W. Lin. ICPP (1), page 445-448. Pennsylvania State University Press, (1990)Distributed Fault Diagnosis in the Butterfly Parallel Processor.T. Sheu, W. Lin, C. Das, and M. Irwin. ICPP (1), page 172-175. Pennsylvania State University Press, (1989)A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects.D. Park, C. Nicopoulos, J. Kim, N. Vijaykrishnan, and C. Das. Nano-Net, page 1-6. IEEE, (2006)CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference.A. Sarma, H. Jiang, A. Pattnaik, J. Kotra, M. Kandemir, and C. Das. MEMSYS, page 396-407. ACM, (2019)Providing fairness in DiffServ architecture.S. Yi, X. Deng, G. Kesidis, and C. Das. GLOBECOM, page 1435-1439. IEEE, (2002)A quadtree communication structure for fast data searching and distribution.W. Lin, T. Sheu, and C. Das. COMPSAC, page 316-323. IEEE, (1988)Cache invalidation strategies for Internet-based vehicular ad hoc networks.S. Lim, C. Yu, and C. Das. Comput. Commun., 35 (3): 380-391 (2012)Leveraging value locality for efficient design of a hybrid cache in multicore processors.M. Arjomand, A. Jadidi, M. Kandemir, and C. Das. ICCAD, page 1-8. IEEE, (2017)A Lazy Scheduling Scheme for Hypercube Computers.P. Mohapatra, C. Yu, and C. Das. J. Parallel Distributed Comput., 27 (1): 26-37 (1995)

BibSonomy

Disambiguation of "Das, Chita R."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A case for integrated processor-cache partitioning in chip multiprocessors.

Please choose a person to relate this publication to

Ragi Chita

Anna Chita

Claudia Dana Chita

Guranda Chitadze

Romy Das

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Das, Chita R."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A case for integrated processor-cache partitioning in chip multiprocessors.

Please choose a person to relate this publication to

Ragi Chita

Anna Chita

Claudia Dana Chita

Guranda Chitadze

Romy Das

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A case for integrated processor-cache partitioning in chip multiprocessors.