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Quantifying Data Locality in Dynamic Parallelism in GPUs., , , , , and . POMACS, 2 (3): 39:1-39:24 (2018)Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance., , , , , , and . CoRR, (2018)Analyzing and Leveraging Remote-Core Bandwidth for Enhanced Performance in GPUs., , , and . PACT, page 258-271. IEEE, (2019)Efficient and Fair Multi-programming in GPUs via Effective Bandwidth Management., , , , and . HPCA, page 247-258. IEEE Computer Society, (2018)Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities., , , , , , , and . PACT, page 31-44. ACM, (2016)Prefetching Techniques for Near-memory Throughput Processors., , , , , and . ICS, page 40:1-40:14. ACM, (2016)Anatomy of GPU Memory System for Multi-Application Execution., , , , , , , , and . MEMSYS, page 223-234. ACM, (2015)Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level., , , , , , , , , and 6 other author(s). HPCA, page 608-619. IEEE Computer Society, (2018)Neither more nor less: Optimizing thread-level parallelism for GPGPUs., , , and . PACT, page 157-166. IEEE Computer Society, (2013)A Research Retrospective on AMD's Exascale Computing Journey., , , , , , , , , and 61 other author(s). ISCA, page 81:1-81:14. ACM, (2023)