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High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network., , , , , , , , , and 1 other author(s). CoRR, (2021)Synchronous Unsupervised STDP Learning with Stochastic STT-MRAM Switching., , , , and . CoRR, (2021)Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification., , , , , and . CoRR, (2019)Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic., , , , , , and . ISCAS, page 1-5. IEEE, (2020)Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing., , , , and . VLSI-SOC, page 210-211. IEEE, (2020)Transient model with interchangeability for dual-gate ambipolar CNTFET logic design., and . NANOARCH, page 61-66. IEEE, (2017)InMnAs magnetoresistive spin-diode logic., , , and . ACM Great Lakes Symposium on VLSI, page 209-214. ACM, (2012)Closed-form model for dual-gate ambipolar CNTFET circuit design., and . ISCAS, page 1-4. IEEE, (2017)Hybrid Pass Transistor Logic With Ambipolar Transistors., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (1): 301-310 (2021)Emitter-coupled spin-transistor logic., , , , and . J. Parallel Distributed Comput., 74 (6): 2461-2469 (2014)