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Disambiguation of "Chan, Pak K."

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Reducing Compilation Time of Zhong's FPGA-Based SAT Solver.

, , , , , , , , , , , , and . FCCM, page 308-309. IEEE Computer Society, (1999)

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i-s k Pak

Mjongsu Pak

Oleg Pak

Wilhelm Chan

Schoro Pak

 

Other publications of authors with the same name

Spectral-Based Multi-Way FPGA Partitioning., , and . FPGA, page 133-139. ACM, (1995)Empirical evaluation of multilevel logic minimization tools for a lookup-table-based field-programmable gate array technology., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (5): 713-722 (1993)Routability-Driven Techology Mapping for LookUp-Table-Based FPGAs., , and . ICCD, page 86-90. IEEE Computer Society, (1992)Parallel placement for field-programmable gate arrays., and . FPGA, page 43-50. ACM, (2003)Multilevel spectral hypergraph partitioning with arbitrary vertex sizes., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (9): 1389-1399 (1999)Computing signal delay in general RC networks by tree/link partitioning., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (8): 898-902 (1990)Delay optimization of carry-skip adders and block carry-lookahead adders., , , and . IEEE Symposium on Computer Arithmetic, page 154-164. IEEE, (1991)A low-offset class-AB CMOS operational amplifier., , , and . ISCAS, page 455-458. IEEE, (2000)Reducing Compilation Time of Zhong's FPGA-Based SAT Solver., , , , , , , , , and 3 other author(s). FCCM, page 308-309. IEEE Computer Society, (1999)Hybrid spectral/iterative partitioning., , and . ICCAD, page 436-440. IEEE Computer Society / ACM, (1997)