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Floating-gate-based intrinsic plasticity with low-voltage rate control., and . ISCAS, page 2507-2510. IEEE, (2016)A mixed-mode FPAA SoC for analog-enhanced signal processing., , , and . CICC, page 1-4. IEEE, (2012)Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform., , , , and . IEEE Trans. Biomed. Circuits Syst., 6 (1): 76-84 (2012)Learning in Silicon Beyond STDP: A Neuromorphic Implementation of Multi-Factor Synaptic Plasticity With Calcium-Based Dynamics., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (12): 2189-2199 (2016)Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset., , , , , , and . EWME, page 1-6. IEEE, (2016)Power-efficient estimation of silicon neuron firing rates with floating-gate transistors., and . ECCTD, page 1-4. IEEE, (2015)STDP-enabled learning on a reconfigurable neuromorphic platform., , and . ECCTD, page 1-4. IEEE, (2013)A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing., , , and . IEEE J. Solid State Circuits, 47 (9): 2174-2184 (2012)A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena., , , , , , and . IEEE Trans. Biomed. Circuits Syst., 7 (1): 71-81 (2013)Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit., , and . Neural Networks, (2013)