Author of the publication

Semantic information based speculative parallel execution

, and . Pespma 2010 - Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture, Saint Malo, France, ()

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Survey of Cache Coherence Schemes for Multiprocessors.. Computer, 23 (6): 12-24 (1990)Starvation-free commit arbitration policies for transactional memory systems., and . SIGARCH Comput. Archit. News, 35 (1): 39-46 (2007)Improving power efficiency of D-NUCA caches., , , , and . SIGARCH Comput. Archit. News, 35 (4): 53-58 (2007)DELTA: Distributed Locality-Aware Cache Partitioning for Tile-based Chip Multiprocessors., , , and . IPDPS, page 578-589. IEEE, (2020)The Velox Transactional Memory Stack., , , , , , , , , and 14 other author(s). IEEE Micro, 30 (5): 76-87 (2010)Enhancing Last-Level Cache Performance by Block Bypassing and Early Miss Determination., and . Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 52-66. Springer, (2006)QoS-Driven Coordinated Management of Resources to Save Energy in Multi-core Systems., , and . IPDPS, page 303-313. IEEE, (2019)ZEBRA: Data-Centric Contention Management in Hardware Transactional Memory., , , , and . IEEE Trans. Parallel Distributed Syst., 25 (5): 1359-1369 (2014)Introduction., , , , and . J. Parallel Distributed Comput., 66 (5): 615-616 (2006)Trends on heterogeneous and innovative hardware and software systems., , , , and . J. Parallel Distributed Comput., (2019)