Inbook,
High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments
23, page 255--268. Springer, (2023)
DOI: 10.1007/978-3-031-46077-7_17
Abstract
An increasing number of sensors and actuators are beingused in today’s high-tech drilling tools to further optimise the drillingprocess. Each sensor and actuator either generates data that needs tobe processed or requires real-time input control signals. RISC-V proces-sors are being developed to meet the computational demands of today’sharsh environment applications. A known bottleneck for processors isthe data flow and instruction input to the processor, especially as mem-ory response times are particularly high for the state-of-the-art 180 nmharsh environment silicon-on-insulator (SOI) technology, further limit-ing the design space. Therefore, this paper presents a high-performanceinstruction fetch architecture that achieves a high clock frequency whilepreserving high instructions per cycle. We evaluate different approachesto implementing such a design and propose a design that is able to reachup to 0.73 instructions per cycle (IPC) and achieve a clock frequency of229 MHz, which is more than twice as high as previous designs in thistechnology. The new architecture achieves 167 million instructions persecond (MIPS), which is four times higher than the rocket chip achieveswhen synthesised for the same harsh environment technology.
