Power Quality Improvement by 11 Level Multilevel Inverter with Reduced
Number of Switches
M. P.T.Krishna Sai1. International Journal of Engineering Research, 4 (8):
465-469(August 2015)
Abstract
This paper deals with 11-level multilevel inverter.
Almost all the drawbacks of the conventional multilevel
inverters is rectified by the proposed topology. This topology
uses less number of switches as compared with conventional
topology, where it reduces the complexity and overall size of
the system which in turn reduces the harmonics and cost of the
entire system. Fewer switches will be conducting for specific
time intervals so switching loss is also reduced in the proposed
topology. A 11-level inverter simulation is carried with the
implementation of nearest level control. The proposal is
validated by extensive simulation studies.
%0 Journal Article
%1 ptkrishnasai1power
%A P.T.Krishna Sai1, Mahammad.Iliyas2
%D 2015
%E editorijer,
%J International Journal of Engineering Research
%K Distortion(THD) Harmonic Total cascaded inverter multilevel
%N 8
%P 465-469
%T Power Quality Improvement by 11 Level Multilevel Inverter with Reduced
Number of Switches
%U http://www.ijer.in/ijer/publication/v4s8/IJER_2015_812.pdf
%V 4
%X This paper deals with 11-level multilevel inverter.
Almost all the drawbacks of the conventional multilevel
inverters is rectified by the proposed topology. This topology
uses less number of switches as compared with conventional
topology, where it reduces the complexity and overall size of
the system which in turn reduces the harmonics and cost of the
entire system. Fewer switches will be conducting for specific
time intervals so switching loss is also reduced in the proposed
topology. A 11-level inverter simulation is carried with the
implementation of nearest level control. The proposal is
validated by extensive simulation studies.
@article{ptkrishnasai1power,
abstract = {This paper deals with 11-level multilevel inverter.
Almost all the drawbacks of the conventional multilevel
inverters is rectified by the proposed topology. This topology
uses less number of switches as compared with conventional
topology, where it reduces the complexity and overall size of
the system which in turn reduces the harmonics and cost of the
entire system. Fewer switches will be conducting for specific
time intervals so switching loss is also reduced in the proposed
topology. A 11-level inverter simulation is carried with the
implementation of nearest level control. The proposal is
validated by extensive simulation studies.
},
added-at = {2015-08-04T11:25:13.000+0200},
author = {P.T.Krishna Sai1, Mahammad.Iliyas2},
biburl = {https://www.bibsonomy.org/bibtex/2c10e304ebd965815031a20ec6590c6da/editorijer},
editor = {editorijer},
interhash = {f4809f6c7c5688f344144f4dc7150deb},
intrahash = {c10e304ebd965815031a20ec6590c6da},
journal = {International Journal of Engineering Research},
keywords = {Distortion(THD) Harmonic Total cascaded inverter multilevel},
month = {AUGUST},
number = 8,
pages = {465-469},
timestamp = {2015-08-04T11:25:13.000+0200},
title = {Power Quality Improvement by 11 Level Multilevel Inverter with Reduced
Number of Switches
},
url = {http://www.ijer.in/ijer/publication/v4s8/IJER_2015_812.pdf},
volume = 4,
year = 2015
}