%0 Journal Article %1 journals/tcad/Pomeranz23b %A Pomeranz, Irith %D 2023 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 8 %P 2752-2760 %T Estimating the Number of Extra Tests During Iterative Test Generation for Single-Cycle Gate-Exhaustive Faults. %U http://dblp.uni-trier.de/db/journals/tcad/tcad42.html#Pomeranz23b %V 42

@article{journals/tcad/Pomeranz23b, added-at = {2023-08-05T00:00:00.000+0200}, author = {Pomeranz, Irith}, biburl = {https://www.bibsonomy.org/bibtex/279f995e000bb90b6005354601a0ca52c/dblp}, ee = {https://doi.org/10.1109/TCAD.2022.3226677}, interhash = {41b11709af13ab151ec013967527b35d}, intrahash = {79f995e000bb90b6005354601a0ca52c}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 8, pages = {2752-2760}, timestamp = {2024-04-08T19:47:00.000+0200}, title = {Estimating the Number of Extra Tests During Iterative Test Generation for Single-Cycle Gate-Exhaustive Faults.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad42.html#Pomeranz23b}, volume = 42, year = 2023 }